hwapi

type ACPIRsdp struct {
	ACPIRsdpRev1

	RSDPLen          uint32
	XSDTPtr          uint64
	ExtendedChecksum uint8
	Reserved         [3]uint8
}

type ACPIRsdpRev1 struct {
	Signature [8]uint8
	Checksum  uint8
	OEMID     [6]uint8
	Revision  uint8
	RSDTPtr   uint32
}

type DMAProtectedRange struct {
	Lock bool
	// Reserved 1-3
	Size uint8
	// Reserved 12-19
	Top uint16
}

type HashAlg uint8

type HwAPI struct{}

type IA32Debug struct {
	Enabled  bool
	Locked   bool
	PCHStrap bool
}

type LowLevelHardwareInterfaces interface {
	// cpuid.go
	VersionString() string
	HasSMX() bool
	HasVMX() bool
	HasMTRR() bool
	ProcessorBrandName() string
	CPUSignature() uint32
	CPUSignatureFull() (uint32, uint32, uint32, uint32)
	CPULogCount() uint32
	CPUID(uint32, uint32) (uint32, uint32, uint32, uint32)

	// e820.go
	IterateOverE820Ranges(target string, callback func(start uint64, end uint64) bool) (bool, error)

	// iommu.go
	LookupIOAddress(addr uint64, regs VTdRegisters) ([]uint64, error)

	// msr.go
	ReadMSR(msr int64) []uint64

	// pci.go
	PCIEnumerateVisibleDevices(cb func(d PCIDevice) (abort bool)) (err error)
	PCIReadConfigSpace(d PCIDevice, off int, len int) ([]byte, error)
	PCIWriteConfigSpace(d PCIDevice, off int, val interface{}) error

	// phys.go
	ReadPhys(addr int64, data UintN) error
	ReadPhysBuf(addr int64, buf []byte) error
	WritePhys(addr int64, data UintN) error

	// tpm.go
	NewTPM() (*TPM, error)
	NVLocked(tpmCon *TPM) (bool, error)
	ReadNVPublic(tpmCon *TPM, index uint32) ([]byte, error)
	NVReadValue(tpmCon *TPM, index uint32, password string, size, offhandle uint32) ([]byte, error)
	ReadPCR(tpmCon *TPM, pcr uint32) ([]byte, error)

	// acpi.go
	GetACPITable(n string) ([]byte, error)

	// smbios.go
	IterateOverSMBIOSTables(n uint8, callback func(s *smbios.Structure) bool) (ret bool, err error)
}

type PCIDevice struct {
	Bus      int
	Device   int
	Function int
	// True if device is hidden
	Hidden bool
	// BARs currently decoded by the device
	BAR map[int]uint64
	// ROM BAR currently decoded by the device
	ROM uint64
}

type PCR struct {
	Index     int
	Digest    []byte
	DigestAlg crypto.Hash
}

type SMBIOSType0 struct {
	Vendor                       string
	BIOSVersion                  string
	BIOSStartingAddress          int
	BIOSReleaseDate              string
	BIOSSize                     int
	BiosCharacteristics          uint32
	BiosCharacteristicsExtension []uint8
	SystemBiosMajor              uint8
	SystemBiosMinor              uint8
	EmbeddedControllerMajor      uint8
	EmbeddedControllerMinor      uint8
	// contains filtered or unexported fields
}

type SMBIOSType16 struct {
}

type SMBIOSType17 struct {
	PhysicalMemory         *SMBIOSType16
	MemoryErrorInformation *SMBIOSType18
	TotalWidth             int
	DataWidth              int
	Size                   uint64
	DeviceLocator          string
	BankLocator            string
	Speed                  int // in MT/s
	Manufacturer           string
	SerialNumber           string
	AssetTag               string
	PartNumber             string
	// contains filtered or unexported fields
}

type SMBIOSType18 struct {
}

type SMRR struct {
	Active   bool
	PhysBase uint64
	PhysMask uint64
}

type TCGVendorID uint32

type TPM struct {
	Version TPMVersion
	Interf  TPMInterface

	SysPath string
	RWC     io.ReadWriteCloser
}

type TPMInfo struct {
	Version      TPMVersion
	Interface    TPMInterface
	VendorInfo   string
	Manufacturer TCGVendorID

	// FirmwareVersionMajor and FirmwareVersionMinor describe
	// the firmware version of the TPM, but are only available
	// for TPM 2.0 devices.
	FirmwareVersionMajor int
	FirmwareVersionMinor int
}

type TPMInterface uint8

type TPMVersion uint8

type Uint16 uint16

type Uint32 uint32

type Uint64 uint64

type Uint8 uint8

type UintN interface {
	// Return size in bytes.
	Size() int64

	// Return string formatted in hex.
	String() string
	// contains filtered or unexported methods
}

type VTdRegisters struct {
	Version                                 uint32 // Architecture version supported by the implementation.
	Reserved1                               uint32 // Reserved
	Capabilities                            uint64 // Hardware reporting of capabilities.
	ExtendedCapabilities                    uint64 // Hardware reporting of extended capabilities.
	GlobalCommand                           uint32 // Register controlling general functions.
	GlobalStatus                            uint32 // Register reporting general status.
	RootTableAddress                        uint64 // Register to set up location of root table.
	ContextCommand                          uint64 // Register to manage context-entry cache.
	Reserved2                               uint32 // Reserved
	FaultStatus                             uint32 // Register to report Fault/Error status
	FaultEventControl                       uint32 // Interrupt control register for fault events.
	FaultEventData                          uint32 // Interrupt message data register for fault events.
	FaultEventAddress                       uint32 // Interrupt message address register for fault event messages.
	FaultEventUpperAddress                  uint32 // Interrupt message upper address register for fault event messages.
	Reserved3                               uint64 // Reserved
	Reserved4                               uint64 // Reserved
	AdvancedFaultLog                        uint64 // Register to configure and manage advanced fault logging.
	Reserved5                               uint32 // Reserved
	ProtectedMemoryEnable                   uint32 // Register to enable DMA-protected memory region(s).
	ProtectedLowMemoryBase                  uint32 // Register pointing to base of DMA-protected low memory region.
	ProtectedLowMemoryLimit                 uint32 // Register pointing to last address (limit) of the DMA-protected low memory region.
	ProtectedHighMemoryBase                 uint64 // Register pointing to base of DMA-protected high memory region.
	ProtectedHighMemoryLimit                uint64 // Register pointing to last address (limit) of the DMA-protected high memory region.
	InvalidationQueueHead                   uint64 // Offset to the invalidation queue entry that will be read next by hardware.
	InvalidationQueueTail                   uint64 // Offset to the invalidation queue entry that will be written next by software.
	InvalidationQueueAddress                uint64 // Base address of memory-resident invalidation queue.
	Reserved6                               uint32 // Reserved
	InvalidationCompletionStatus            uint32 // Register to indicate the completion of an Invalidation Wait Descriptor with IF=1.
	InvalidationCompletionEventControl      uint32 // Register to control Invalidation Queue Events
	InvalidationCompletionEventData         uint32 // Invalidation Queue Event message data register for Invalidation Queue events.
	InvalidationCompletionEventAddress      uint32 // Invalidation Queue Event message address register for Invalidation Queue events.
	InvalidationCompletionEventUpperAddress uint32 // Invalidation Queue Event message upper address register for Invalidation Queue events.
	Reserved7                               uint64 // Reserved.
	InterruptRemappingTableAddress          uint64 // Register indicating Base Address of Interrupt Remapping Table.
	PageRequestQueueHead                    uint64 // Offset to the page request queue entry that will be processed next by software.
	PageRequestQueueTail                    uint64 // Offset to the page request queue entry that will be written next by hardware.
	PageRequestQueueAddress                 uint64 // Base address of memory-resident page request queue.
	Reserved8                               uint32 // Reserved
	PageRequestStatus                       uint32 // Register to indicate one or more pending page requests in page request queue.
	PageRequestEventControl                 uint32 // Register to control page request events.
	PageRequestEventData                    uint32 // Page request event message data register.
	PageRequestEventAddress                 uint32 // Page request event message address register
	PageRequestEventUpperAddress            uint32 // Page request event message upper address register.
	MTRRCapability                          uint64 // Register for MTRR capability reporting.
	MTRRDefaultType                         uint64 // Register to configure MTRR default type.
	FixedRangeMTRR64K00000                  uint64 // Fixed-range memory type range register for 64K range starting at 00000h.
	FixedRangeMTRR16K80000                  uint64 // Fixed-range memory type range register for 16K range starting at 80000h.
	FixedRangeMTRR16KA0000                  uint64 // Fixed-range memory type range register for 16K range starting at A0000h.
	FixedRangeMTRR4KC0000                   uint64 // Fixed-range memory type range register for 4K range starting at C0000h.
	FixedRangeMTRR4KC8000                   uint64 // Fixed-range memory type range register for 4K range starting at C8000h.
	FixedRangeMTRR4KD0000                   uint64 // Fixed-range memory type range register for 4K range starting at D0000h.
	FixedRangeMTRR4KD8000                   uint64 // Fixed-range memory type range register for 4K range starting at D8000h.
	FixedRangeMTRR4KE0000                   uint64 // Fixed-range memory type range register for 4K range starting at E0000h.
	FixedRangeMTRR4KE8000                   uint64 // Fixed-range memory type range register for 4K range starting at E8000h.
	FixedRangeMTRR4KF0000                   uint64 // Fixed-range memory type range register for 4K range starting at F0000h.
	FixedRangeMTRR4KF8000                   uint64 // Fixed-range memory type range register for 4K range starting at F8000h.
	VariableRangeMTRRBase0                  uint64 // Variable-range memory type range0 base register.
	VariableRangeMTRRMask0                  uint64 // Variable-range memory type range0 mask register.
	VariableRangeMTRRBase1                  uint64 // Variable-range memory type range1 base register.
	VariableRangeMTRRMask1                  uint64 // Variable-range memory type range1 mask register.
	VariableRangeMTRRBase2                  uint64 // Variable-range memory type range2 base register.
	VariableRangeMTRRMask2                  uint64 // Variable-range memory type range2 mask register.
	VariableRangeMTRRBase3                  uint64 // Variable-range memory type range3 base register.
	VariableRangeMTRRMask3                  uint64 // Variable-range memory type range3 mask register.
	VariableRangeMTRRBase4                  uint64 // Variable-range memory type range4 base register.
	VariableRangeMTRRMask4                  uint64 // Variable-range memory type range4 mask register.
	VariableRangeMTRRBase5                  uint64 // Variable-range memory type range5 base register.
	VariableRangeMTRRMask5                  uint64 // Variable-range memory type range5 mask register.
	VariableRangeMTRRBase6                  uint64 // Variable-range memory type range6 base register.
	VariableRangeMTRRMask6                  uint64 // Variable-range memory type range6 mask register.
	VariableRangeMTRRBase7                  uint64 // Variable-range memory type range7 base register.
	VariableRangeMTRRMask7                  uint64 // Variable-range memory type range7 mask register.
	VariableRangeMTRRBase8                  uint64 // Variable-range memory type range8 base register.
	VariableRangeMTRRMask8                  uint64 // Variable-range memory type range8 mask register.
	VariableRangeMTRRBase9                  uint64 // Variable-range memory type range9 base register.
	VariableRangeMTRRMask9                  uint64 // Variable-range memory type range9 mask register.
	VirtualCommandCapability                uint64 // Hardware reporting of commands supported by virtual-DMA Remapping hardware.
	Reserved10                              uint64 // Reserved for future expansion of Virtual Command Capability Register.
	VirtualCommand                          uint64 // Register to submit commands to virtual DMA Remapping hardware.
	Reserved11                              uint64 // Reserved for future expansion of Virtual Command Register.
	VirtualCommandResponse                  uint64 // Register to receive responses from virtual DMA Remapping hardware.
	Reserved12                              uint64 // Reserved for future expansion of Virtual Command Response Register.
}