Documentation
¶
Overview ¶
Package board provides a minimal QEMU q35 / x86_64 tamago board for the go-virtio validate harness.
It is a near-verbatim copy of tamago's board/cloud_hypervisor/vm wiring (same AMD64 + IOAPIC + COM1 UART + DMA setup, port-mapped PCI config at 0xcf8/0xcfc which QEMU's q35/pc machines expose identically) with ONE deliberate difference: it does NOT call kvm/pvclock.Init.
Rationale: pvclock.Init panics ("could not set system timer") on any host where the CPU advertises neither an invariant TSC nor the KVM paravirtual clock. Under QEMU TCG emulation (the only option for an x86_64 guest on an arm64 host, since HVF accelerates arm64 only) QEMU refuses to advertise CPUID[80000007h].EDX.invtsc and exposes no KVM CPUID leaves, so every stock amd64 tamago board hits that panic. The pvclock adjustment is purely an opportunistic TSC-reliability tweak; amd64.Init()/initTimers() already calibrates the timer from the TSC / ACPI-PM timer independently, so omitting it is safe for a correctness harness (wall-clock drift is irrelevant here).
This is the documented tamago board-extension point (a board is just a package that wires runtime/goos.Hwinit1); it is NOT a patch to upstream tamago.
Index ¶
Constants ¶
const ( // Communication port (COM1) COM1 = 0x3f8 // Intel I/O Programmable Interrupt Controller IOAPIC0_BASE = 0xfec00000 )
Peripheral registers
Variables ¶
var ( // CPU instance AMD64 = &amd64.CPU{ TimerMultiplier: 1, } // I/O APIC IOAPIC0 = &ioapic.IOAPIC{ Base: IOAPIC0_BASE, } // Serial port UART0 = &uart.UART{ Index: 1, Base: COM1, } )
Peripheral instances
Functions ¶
Types ¶
This section is empty.
Source Files