gocw

type Adc struct {
	// contains filtered or unexported fields
}

type AdcInterface interface {
	io.Closer
	Error() error
	//
	// Hardware information.
	//
	Version() HwVersion
	SysFreq() uint32
	MaxSamples() uint32
	//
	// Gain settings.
	//
	GainMode() GainMode
	// Sets the AD8331 Low Noise Amplifier into to "High" or \"Low\" gain mode.
	// Low mode ranges from -4.5dB to +43.5dB, and High mode ranges from +7.5dB to +55.5dB.
	// Better performance is found using the "High" gain mode typically.
	SetGainMode(mode GainMode)
	Gain() uint8
	// Sets the AD8331 gain value.
	// This is a unitless number which ranges from 0 (minimum) to 78 (maximum).
	// The resulting gain in dB is given in the "calculated" output.
	SetGain(gain uint8)
	// Gives the status of the digital signal being used as the trigger signal,
	// either high or low.
	TriggerPinState() bool
	// When using a digital system, sets the trigger mode:
	//  =============== ==============================
	//  Mode            Description
	//  =============== ==============================
	//  Rising Edge     Trigger on rising edge only.
	//  Falling Edge    Trigger on falling edge only.
	//  Low             Trigger when line is "low".
	//  High            Trigger when line is "high".
	//  =============== ==============================
	// Note the "Trigger Mode" should be set to "Rising Edge" if using either
	// the "SAD Trigger" or "IO Trigger" modes.
	// If using STREAM mode (CW-Pro only), the trigger should use a rising or
	// falling edge. Using a constant level is possible, but normally requires
	// additional delay added via "offset" (see stream mode help for details).
	TriggerMode() TriggerMode
	SetTriggerMode(mode TriggerMode)
	// Delays this many samples after the trigger event before recording samples.
	// Based on the ADC clock cycles. If using a 4x mode for example, an offset of "1000"
	// would mean we skip 250 cycles of the target device.
	TriggerOffset() uint32
	SetTriggerOffset(offset uint32)
	// Record a certain number of samples before the main samples are captured.
	// If "offset" is set to 0, this means recording samples BEFORE the trigger event.
	PreTriggerSamples() uint32
	SetPreTriggerSamples(samples uint32)
	// Total number of samples to record. Note the capture system has an upper
	// limit. Older FPGA bitstreams had a lower limit of about 256 samples.
	// For the CW-Lite/Pro, the current lower limit is 128 samples due to interactions with
	// the SAD trigger module.
	TotalSamples() uint32
	SetTotalSamples(samples uint32)
	// Downsamples incomming ADC data by throwing away the specified number of
	// samples between captures. Synchronous to the trigger so presample
	// mode is DISABLED when this value is greater than 1.
	DownsampleFactor() uint16
	SetDownsampleFactor(factor uint16)
	// Measures number of ADC clock cycles during which the trigger was active.
	// If trigger toggles more than once this may not be valid.`,
	ActiveCount() uint32
	// The ADC sample clock is generated from this source.
	// Options are either an external input (which input set elsewhere) or an internal
	// clock generator. Details of each option:
	// =================== ====================== =================== ===============
	//  Name                Description            Input Freq Range   Fine Phase Adj.
	// =================== ====================== =================== ===============
	//  EXCLK Direct       Connects sample clock     1-105 MHz            NO
	//                     external pin directly.
	//  EXTCLK xN via DCM  Takes external pin,       5-105 MHz (x1)       YES
	//                     multiplies frequency      5-26.25 MHz (x4)
	//                     xN and feeds to ADC.
	//  CLKGEN xN via DCM  Multiples CLKGEN by       5-105 MHz (x1)       YES
	//                     xN and feeds to ADC.      5-26.25 MHz (x4)
	// =================== ====================== =================== ===============
	AdcClockSource() AdcSrcTuple
	SetAdcClockSource(src AdcSrcTuple)
	AdcFreq() uint32
	// ADC Sample Rate. Takes account of decimation factor (if set).
	AdcSampleRate() uint32
	DcmLocked() bool
	// Freq Counter: Frequency of clock measured on EXTCLOCK pin in Hz.
	FreqCounter() uint32
	FreqCounterSource() FreqCounterSrc
	SetFreqCounterSource(src FreqCounterSrc)
	ClkGenInputSource() ClkGenInputSrc
	SetClkGenInputSource(src ClkGenInputSrc)
	// The input frequency from the EXTCLK source in Hz.
	//
	// This value is used to help calculate the correct CLKGEN settings to
	// obtain a desired output frequency when using EXTCLK as CLKGEN input.
	// It is not a frequency counter - it is only helpful if the EXTCLK
	// frequency is already known.
	//
	// Getter: Return the last set EXTCLK frequency in MHz (int)
	//
	// Setter: Update the EXTCLK frequency
	ExtClockFreq() uint32
	SetExtClockFreq(freq uint32)
	// CLKGEN output frequency in Hz.
	// The CLKGEN module takes the input source and multiplies/divides it
	// to get a faster or slower clock as desired.
	//
	// Getter:
	//   Return the current calculated CLKGEN output frequency in Hz
	//   (float). Note that this is the theoretical frequency - use the
	//   freq counter to determine the actual output.
	//
	// Setter:
	//   Attempt to set a new CLKGEN frequency in Hz. When this value is
	//   set, all possible DCM multiply/divide settings are tested to find
	//   which is closest to the desired output speed. If EXTCLK is the
	//   CLKGEN source, the EXTCLK frequency must be properly set for this
	//   to work. Also, both DCMs are reset.
	ClkGenOutputFreq() uint32
	SetClkGenOutputFreq(freq uint32)
	ClkGenDcmLocked() bool
	// The logical input into the trigger module.
	//
	// The trigger module uses some combination of the scope's I/O pins to
	// produce a single value, which it uses for edge/level detection or UART
	// triggers. This trigger output can combine 5 pins using one of 3
	// different boolean operations.
	//
	TriggerTargetIoPins() []TriggerTargetIoPin
	SetTriggerTargetIoPin(pin TriggerTargetIoPin)
	//
	// GPIO settings.
	//
	// Thr function of the Target IO1 pin.
	TargetIo1() TargetIoMode
	SetTargetIo1(mode TargetIoMode)
	// Thr function of the Target IO2 pin.
	TargetIo2() TargetIoMode
	SetTargetIo2(mode TargetIoMode)
	// Special GPIO: NRST
	NRST() GpioMode
	SetNRST(mode GpioMode)
	// Special GPIO: PDIC
	PDIC() GpioMode
	SetPDIC(mode GpioMode)
	// Special GPIO: PDID
	PDID() GpioMode
	SetPDID(mode GpioMode)
	// The clock signal routed to the HS2 high speed output pin.
	Hs2() Hs2Mode
	SetHs2(mode Hs2Mode)
	//
	// Capture settings.
	//
	SetArmOn()
	SetArmOff()
	WaitForTigger() bool
	TraceData() []float64
}

type AdcSrc int

type AdcSrcTuple struct {
	AdcSrc   AdcSrc
	DcmOut   int
	DcmInput DcmInput
}

type Address uint32

type AddressBlock struct {
	Dlen uint32
	Addr uint32
}

type AdvClkSettings struct {
	SrcAndStatus uint8
	Mul          uint8
	Div          uint8
	ClkGenFlags  uint8
}

type BaudRate uint32

type Capture []Trace

type ClkGenInputSrc int

type DataBits uint8

type DcmInput int

type Fpga struct {
	Mem *Memory
	// contains filtered or unexported fields
}

type FreqCounterSrc int

type FwVersion struct {
	Major uint8
	Minor uint8
	Debug uint8
}

type GainMode int

type GpioMode int

type Hs2Mode int

type HwType int

type HwVersion struct {
	RegVersion uint8
	HwType     HwType
	HwVersion  uint8
}

type Memory struct {
	// contains filtered or unexported fields
}

type Parity uint8

type PtGen func() ([]byte, error)

type Request uint8

type SimpleSerial struct {
	// contains filtered or unexported fields
}

type StopBits uint8

type TargetIoMode int

type Trace struct {
	Key               []byte    `json:"k"`
	Pt                []byte    `json:"pt"`
	Ct                []byte    `json:"ct"`
	PowerMeasurements []float64 `json:"pm"`
}

type TriggerMode int

type TriggerTargetIoPin int

type Usart struct {
	// contains filtered or unexported fields
}

type UsartConfig struct {
	BaudRate BaudRate
	StopBits StopBits
	Parity   Parity
	DataBits DataBits
}

type UsartInterface interface {
	io.Reader
	io.Writer
	// Clears any pending data from the read buffer.
	Flush() (err error)
	// Gets/Sets Read timeout.
	Timeout() time.Duration
	SetTimeout(timeout time.Duration)
}

type UsbDevice struct {
	// contains filtered or unexported fields
}

type UsbDeviceInterface interface {
	// Reads/Writes to bulk data endpoint.
	io.Reader
	io.Writer
	io.Closer
	// Sends a request over the control endpoint.
	ControlIn(request Request, val uint16, data interface{}) error
	ControlOut(request Request, val uint16, data interface{}) error
}